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asplos-experiments

separate

Use when designing or auditing the evaluation of an ASPLOS paper — choosing among real silicon, FPGA prototypes, and simulators with cycle-accuracy caveats stated, selecting workload suites and baselines that hold up across three communities, attributing wins via ablation, and reporting energy, area, and overhead honestly.

When to use

• designing ASPLOS paper evaluation
• auditing ASPLOS paper evaluation
• choosing between real silicon, FPGA, and simulators
• selecting workload suites and baselines
• attributing wins via ablation
• reporting energy, area, and overhead
• managing cycle-accuracy caveats
• handling measurement noise on real hardware

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