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ieee-international-symposium-on-high-performance-computer-architecture
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Use when targeting IEEE International Symposium on High-Performance Computer Architecture (HPCA) or deciding whether a computer-science manuscript fits this venue. Encodes conference fit, framing, evidence bar, submission-cycle checks, rebuttal posture, and desk-reject risks for computer architecture.
When to use
- targeting IEEE International Symposium on High-Performance Computer Architecture (HPCA)
- deciding whether a computer-science manuscript fits this venue
- conference fit, framing, evidence bar, submission-cycle checks, rebuttal posture, and desk-reject risks
- high-performance architecture, accelerators, memory systems, interconnects, and datacenter hardware
- re-framing from journal style or arXiv style into a selective CS conference narrative
- evidence-gap, anonymity, artifact, rebuttal, or re-routing diagnosis
- microarchitecture, memory hierarchy, accelerators, processor design, architectural simulation, or hardware/software co-design
When not to use
- substitute for the current year's CFP, author kit, ethics policy, or submission portal
- generic CS paper
- broad computer-architecture work
- programming-language/runtime co-design
- full HPC systems
- microarchitecture-implementation work
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